Cappella is a highly flexible CMOS image sensor platform designed for a large range of space applications. The family consists of two main variants, one for use where low noise is critical and the second designed for high signal applications. Both of these variants can be combined with a number of other options including package design and AR coatings.

Key benefits include low noise and high full well capacity sensor variants, back-illumination, with on chip analogue to digital conversion (ADC) and is therefore easy-to-use.

Pixel read timing is set by an on-chip sequencer to simplify use and to reduce pin count.

A column parallel ADC is used to quantise each row of pixels in turn and is controlled by its own sequencer. Resolution can be set from 8 to 14 bits.

Four low-voltage differential signalling (LVDS) channels output the image data and are controlled by the readout sequencer to scan along each row in turn. Two LVDS synchronisation channels allow accurate data sampling.

All configuration settings are programmed over an SPI. This includes shutter mode, ADC resolution and bias current values. Different package options are available.

• Capella LS - CIS120-10-*-LS - 61Ke Full Well Capacity (FWC)
• Capella LN - CIS120-10-*-LN - 43Ke Full Well Capacity (FWC)
• Capella XLS  -CIS120-10-*-LN - 100Ke Full Well Capacity (FWC)